1. Consider the representation of six-bit numbers by two’s complement, one’s complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000?
(a) Two’s complement only
(b) Sign and magnitude and one’s complement only
(c) Two’s complement and one’s complement only
(d) All three representations.
2. A hexadecimal odometer displays F 52 F. The next reading will be
(a)F52E
(b)G52F
(c)F53F
(d)F53O.
3. Positive logic in a logic circuit is one in which
(a) logic 0 and 1 are represented by 0 and positive voltage respectively
(b) logic 0 and, -1 are represented by negative and positive voltages respectively
(c) logic 0 voltage level is higher than logic 1 voltage level
(d) logic 0 voltage level is lower than logic 1 voltage level.
4. Which of the following gate is a two-level logic gate
(a) OR gate
(b) NAND gate
(c) EXCLUSIVE OR gate
(d) NOT gate.
5. Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bits Synchronous counter is
(a) TTLAS
(b) CMOS
(c)ECL
(d)TTLLS
6. An AND gate will function as OR if
(a) all the inputs to the gates are “1”
(b) all the inputs are ‘0’
(c) either of the inputs is “1”
(d) all the inputs and outputs are complemented.
7. An OR gate has 6 inputs. The number of input words in its truth table are
(a)6
(b)32
(c) 64
(d) 128
8. A debouncing circuit is
(a) an astable MV
(b) a bistable MV
(c) a latch
(d) a monostable MV.
9. NAND. gates are preferred over others because these
(a) have lower fabrication area
(b) can be used to make any gate
(c) consume least electronic power
(d) provide maximum density in a chip.
10. In case of OR gate, no matter what the number of inputs, a
(a) 1 at any input causes the output to be at logic 1
(b) 1 at any input causes the output to be at logic 0
(c) 0 any input causes the output to be at logic 0
(d) 0 at any input causes the output to be at logic 1.
11. The fan put of a 7400 NAND gate is
(a)2TTL
(b)5TTL
(c)8TTL
(d)10TTL
12. Excess-3 code is known as
(a) Weighted code
(b) Cyclic redundancy code
(c) Self-complementing code
(d) Algebraic code.
13. Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is
(a)10 CPS
(b)120 CPS
(c) 12CPS
(d) None of the above.
14. Indicate which of the following three binary additions are correct?
1.1011 + 1010 = 10101
II. 1010 + 1101 = 10111
III. 1010 + 1101 = 11111
(a) I and II
(b) II and III
(c) III only
(d) II and III
15. It is required to construct a
counter to count upto 100(decimal). The minimum number of flip-flops required
to construct the counter is
a. 8
b. 7
c. 6
d. 5
16. The gate that assumes the 1 state,
if and only if the input does not take a 1 state is called........
a. AND gate
b. NOT gate
c. NOR gate
d. Both b and c
17. For NOR circuit SR flip flop the not
allowed condition is....
a. S=0, R=0
b. S=0, R=1
c. S=1, R=1
d. S=1, R=0
(Ans: C . When S=R=1 the output is
subject to unpredictable behaviour when S and R return to 0 simultaneously.)
18. The AND operation implies ______________.
a) boolean addition b) boolean multiplication
c) Boolean
subtraction d)
boolean division
19. The output of a NAND gate is ___________, when all
the inputs are high.
a) low b) high c) low or high d) none of these
20.The output of a NOR gate is ___________, when all the
inputs are low.
a) low b) high c) low or high d) none of these
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